Senior Dft Engineer

AMD AMD · Semiconductors · Penang, Malaysia · Engineering

This role is for a Senior DFT Engineer at AMD, focusing on Design-for-Test (DFT) and Design-for-Debug (DFD) for complex ASIC designs. Responsibilities include RTL design, integration, synthesis, timing analysis, verification, documentation, and developing support technologies. The role requires extensive experience in DFT techniques, ASIC design, and related EDA tools.

What you'd actually do

  1. Working with a multi-functional and cross-GEOs team of engineers on DFT (design-for-test) and DFD (design-for-debug) architecture and methodology.
  2. Performing design-for-test (DFT) RTL design using architectural specifications and design generation flows
  3. Performing DFT RTL integration, synthesis, equivalency checking, timing analysis and defining constraints, verification of DFx logic at RTL and GLS.
  4. Writing and maintain DFT documentation and specifications.
  5. Developing CAD software, scripts and other support technology to enable successful construction of DFT logics in complex SoC design.

Skills

Required

  • DFT design
  • integration
  • verification
  • ATPG
  • Silicon Debug
  • Verilog
  • UNIX/Linux
  • scripting languages (TCL, c-shell, Perl)
  • EDA tools/methodology
  • synthesis
  • equivalency checking
  • static timing analysis
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Nice to have

  • JTAG/IEEE standards
  • scan and ATPG
  • on-chip test pattern compression
  • at-speed testing using PLL
  • memory BIST and repair
  • logic BIST
  • power-gating
  • on-chip debug logic
  • testing of high speed SerDes IO and analog design
  • ATE and digital IC manufacturing test

What the JD emphasized

  • 6 years of DFT design, integration, verification, ATPG and Silicon Debug experience.