Senior Dft Verification Engineer

NVIDIA NVIDIA · Semiconductors · Bangalore, India

NVIDIA is seeking a Senior DFT Verification Engineer in Bengaluru, India, to own DFX verification, pattern development, and silicon bring-up for various test features. The role involves improving DFT methodologies and collaborating with cross-functional teams.

What you'd actually do

  1. As a valued member of our team, you will take end-to-end ownership of DFX verification, pattern development, and silicon bring-up for a range of test features—including JTAG, boundary scan, security mechanisms, reliability tests like HTOL/IDDQ and test clocking—across various test modes, including multiple ATPG configurations in multi-die environments.
  2. Work closely with various DFX teams, CAD, and methodology teams to improve the flows and processes.
  3. In addition, you will help develop and deploy DFT methodologies for our next-generation products.
  4. Be a part of innovation to strive to improve the quality of DFT methods and AI deployment in the processes.
  5. You will also need to work with multi-functional teams to incorporate DFT features into the chip.

Skills

Required

  • BSEE or MSEE from reputed institutions or equivalent experience with 3+ years of experience
  • proficient in static timing analysis, ECO, ASIC/Logic Design Flow, HDL, and Digital logic design
  • Experience in RTL and Gates verification, simulation, and silicon bring-up
  • familiar with BIST architecture and JTAG/IEEE1149.1/1500/1687/1838
  • Strong DFT knowledge in Scan ATPG, compression techniques, and memory test
  • Strong analytical and problem-solving skills
  • good scripting knowledge (either Perl/Python)

What the JD emphasized

  • end-to-end ownership of DFX verification
  • silicon bring-up
  • develop and deploy DFT methodologies
  • AI deployment in the processes