Senior Dfx Methodology Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior DFX Engineer at NVIDIA, responsible for implementing state-of-the-art designs in test access mechanisms and developing DFX methodologies for next-generation semiconductor chips. Requires expertise in DFT, silicon debug, and scripting.

What you'd actually do

  1. As a member in our team, you will own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms which include I1149.1, I1500, I1687, memory BIST, P2929, scan dump and array dump.
  2. Develop and deploy DFX methodologies for our next generation products
  3. Help mentor junior engineers on test designs and trade-offs including cost and quality.

Skills

Required

  • BSEE or equivalent experience with 5+ years of proven experience, MSEE or PhD with 3+ years of proven experience in DFT or related domains
  • Excellent analytical skills in verification and validation of test sequences and logic on complex and multi-million gate designs using vendor or in-house tools
  • Experience in Silicon debug and bring-up on the ATE and system level testing with an understanding of pattern formats, failure processing, and test program development
  • Proven knowledge and expertise in scan architecture, BIST including memories and IOs
  • Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs

Nice to have

  • Strong programming and scripting skills in Perl, Python or Tcl
  • Exceptional written and oral interpersonal skills