Senior Dl Compiler Engineer- Cuda Tile

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA +5 · Remote

This role focuses on developing and optimizing a new tile-based programming model (CUDA Tile) for NVIDIA GPUs, involving compiler transformations, MLIR dialects, and performance optimization for efficient execution across GPU generations. It's a core engineering role in GPU computing infrastructure.

What you'd actually do

  1. You will design and implement compiler transformations, develop MLIR-based dialects and lowering passes, and optimize the performance of tile-based kernels to ensure they execute efficiently across multiple generations of NVIDIA GPU architectures.
  2. The scope of these efforts includes defining public APIs, crafting and implementing compiler and optimization techniques, performance optimization, and other general software engineering work.

Skills

Required

  • Bachelors, Masters or Ph.D. in Computer Science, Computer Engineering or a related field (or equivalent experience)
  • 3+ years of relevant work or research experience in compiler optimization, performance analysis and IR design.
  • Ability to work independently, define project goals and scope, and lead your own development effort.
  • Excellent C/C++ programming and software design skills, including debugging, performance analysis, and test design.
  • Strong interpersonal skills

Nice to have

  • Knowledge of CPU and/or GPU architecture.
  • CUDA or OpenCL programming experience.
  • Experience with MLIR, LLVM, XLA, TVM
  • Experience with deep learning models and algorithms.

What the JD emphasized

  • 3+ years of relevant work or research experience in compiler optimization, performance analysis and IR design.
  • Excellent C/C++ programming and software design skills, including debugging, performance analysis, and test design.
  • Strong interpersonal skills are required along with the ability to work in a dynamic product-oriented team.