Senior Formal Verification Engineer - Lpu

NVIDIA NVIDIA · Semiconductors · CA +4 · Remote

Senior Formal Verification Engineer at NVIDIA focusing on verifying AI-related ASIC designs using formal verification methods. Requires extensive experience in ASIC verification, formal techniques, SystemVerilog Assertions (SVA), and formal verification tools. The role involves collaboration with design teams, methodology leadership, and mentorship.

What you'd actually do

  1. Verify AI-related sophisticated ASIC designs & features with formal verification methods.
  2. Partner with architecture/RTL teams to specify properties, resolve deep design issues, and influence micro-architecture decisions.
  3. Leverage and unleash the power of formal verification to rigorously verify critical design properties and ensure compliance with specifications, as well as minimize spec ambiguities.
  4. Develop and implement advanced formal verification environments and methodologies for complex ASIC designs, including automated flows for scalability and efficiency
  5. Train and coach junior engineers on formal techniques and standard processes; Help on methodology/FAQ documentation.

Skills

Required

  • BS/MS/PhD or equivalent experience in CS/CE/EE
  • 12+ years in ASIC verification with 8+ years focused on formal verification methods
  • Mastery of SystemVerilog Assertions (SVA) and formal property verification
  • Proficient on at least one popular formal verification tool in the industry(JapserGold, VC Formal, etc.)
  • Good scripting skills for flow automation(tcl, python, etc.)
  • Good written and oral communication skills
  • Keen attention to details

Nice to have

  • Shown success in full-cycle formal sign-off for complex designs
  • Expertise in formal apps: FPV apps, sequential equivalence checks, datapath verification, etc.
  • Deep understanding of GPU or LPU architecture/design

What the JD emphasized

  • 12+ years in ASIC verification with 8+ years focused on formal verification methods
  • Mastery of SystemVerilog Assertions (SVA) and formal property verification
  • Proficient on at least one popular formal verification tool in the industry(JapserGold, VC Formal, etc.)
  • Shown success in full-cycle formal sign-off for complex designs