Senior Foundry Device Engineer

Intel Intel · Semiconductors · Arizona, Phoenix, United States

Senior Device Engineer role at Intel, focusing on developing and customizing CMOS device technology for foundry customers. Responsibilities include collaborating with development and manufacturing teams, owning NPI, performing device optimizations, and utilizing data analysis for learning. Requires strong CMOS device physics knowledge and experience in advanced transistor architectures, preferably in a foundry environment.

What you'd actually do

  1. Collaborate with the Development team to develop new device technology and customize newly developed device architectures to customer needs.
  2. Collaborate with the manufacturing team to develop and refine fabrication processes that meet device specifications and yield targets.
  3. Develop CMOS logic device technologies with embedded features for various foundry customer use in a large-volume manufacturing environment.
  4. Drive the development and implementation of customized semiconductor device technologies, ensuring compatibility with Intel's existing manufacturing processes and platforms.
  5. Owning NPI (New Product Introduction) in production fabs and perform product-specific device characteristics optimizations and DOE.

Skills

Required

  • CMOS device engineering
  • device physics
  • logic development
  • architecture development
  • interconnect development
  • advanced CMOS device technology
  • data analysis
  • scripting
  • engineering data analysis tools

Nice to have

  • foundry environment experience
  • foundry NPI activities
  • trouble-shooting tape-out issues
  • IC wafer fabrication process engineering
  • manufacturing systems
  • semiconductor materials
  • wafer test
  • photolithography
  • advanced patterning
  • thin film deposition
  • planarization
  • defect metrology
  • spectroscopy
  • interpreting product data
  • finding failure root cause
  • inline indicators
  • driving for solutions
  • advanced node semiconductor technology device development
  • 3nm–16nm FinFETs
  • sub‑3nm GAA FETs
  • High-Volume Manufacturing environment
  • Process Design Kit (PDK) silicon model target generation
  • silicon-to-simulation correlation
  • test structure design
  • device modeling
  • electrical characterization

What the JD emphasized

  • strong CMOS Device knowledge
  • advanced CMOS device technology
  • foundry NPI activities
  • advanced node semiconductor technology device development