Senior Fpga Engineer

Anduril Anduril · Defense · Costa Mesa, CA · Mission Systems : Battlespace Awareness Engineering : Battlespace Awareness Radar

Senior FPGA Engineer for a defense technology company developing advanced radar systems. The role involves leading FPGA architecture, design, and verification, translating signal processing algorithms into FPGA implementations, and establishing design processes. Requires expertise in RTL development, Xilinx tools, and digital signal processing on FPGAs.

What you'd actually do

  1. Lead FPGA architecture, design, and verification efforts for airborne radar systems from concept through production
  2. Translate signal processing algorithms into efficient, high-performance FPGA implementations on Xilinx SOC/FPGA platforms
  3. Establish and drive robust FPGA design processes, coding standards, and verification methodologies for the airborne products team
  4. Collaborate with the Battlespace Awareness engineering team to ensure design consistency and knowledge transfer across sites
  5. Design and implement digital signal processing chains for radar systems, including data acquisition, filtering, and real-time processing

Skills

Required

  • FPGA design and development
  • RTL design using SystemVerilog and/or VHDL
  • Xilinx FPGA devices and development tools (Vivado, Quartus, etc.)
  • Digital signal processing implementation on FPGAs
  • Self-directed technical leadership
  • FPGA verification methodologies and simulation tools
  • Timing closure, resource optimization, and FPGA design constraints
  • Ability to obtain and maintain an active U.S. Secret security clearance

Nice to have

  • radar systems or software-defined radio development
  • high-speed interfaces (PCIe, Ethernet, JESD204B, etc.)
  • Xilinx Zynq UltraScale+, Altera AgileX, or RFSoC platforms
  • embedded software development for FPGA SoC platforms
  • MATLAB and algorithm-to-hardware workflows
  • RF systems and digital front-end design
  • DO-254 or similar hardware design standards for airborne systems
  • version control (Git) and continuous integration workflows
  • aerospace or defense systems development

What the JD emphasized

  • technical lead for FPGA development
  • establishing the foundation for FPGA design processes and best practices
  • translating algorithmic requirements into FPGA implementations
  • independently drive it through to hardware implementation
  • Lead FPGA architecture, design, and verification efforts
  • Translate signal processing algorithms
  • Establish and drive robust FPGA design processes
  • Design and implement digital signal processing chains
  • Perform timing analysis, resource optimization, and debugging
  • Develop and maintain design documentation
  • Mentor and guide other engineers