Senior Fpga Prototyping Engineer - Hardware

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

This role focuses on building and optimizing FPGA prototypes for next-generation GPUs and SOCs, involving RTL design, synthesis, place and route, timing closure, and bring-up on FPGA platforms. It requires strong digital design, FPGA prototyping, and debugging skills, with an emphasis on hardware engineering rather than AI model development.

What you'd actually do

  1. Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route.
  2. Improve performance of the prototype, analyze timing and generate bit streams.
  3. Bring up the design on FPGA prototyping platforms and indulge in problem solving.
  4. Release the prototype to the customers and support them when they face problems.
  5. You are expected to understand the design and implementation, define the configurations, develop/modify the bringup and testing infrastructure and verify the correctness of the design.

Skills

Required

  • BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 7+ years of experience, or MS with 5+ years of proven experience in FPGA prototyping.
  • Good understanding of FPGA prototyping architecture, devices, flows and tools.
  • Experience in backend flows of FPGA Prototyping - Synthesis, P&R and Timing closure, with emphasis on Synopsys Protocompiler or Siemens VPS and Xilinx Vivado
  • Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB).
  • Knowledge of Verilog, System Verilog and digital design concepts.
  • Good debugging and problem solving skills.
  • Hands on experience with lab FPGA debug methodologies, tools (Identify or ChipScope), and lab debug equipment (oscilloscopes, logic analyzers).

Nice to have

  • Scripting knowledge (Perl/shell/Tcl) is desired.
  • Good documentation, communication and interpersonal skills.
  • Experience with memory bring up of Memory (LPDDR5/6, DDR5/6), CXL/PCIE and/or high speed I/F such as USB4/3 is desirable
  • Prior experience with hardware emulation or prototyping (Synopsys HAPS or Siemens ProFPGA) of a high-performance processor or SOC is a plus.

What the JD emphasized

  • FPGA prototyping
  • performance of the prototype
  • timing closure
  • Synopsys Protocompiler or Siemens VPS and Xilinx Vivado
  • hardware emulation or prototyping