Senior High-speed Io Validation Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior High-Speed IO Validation Engineer at NVIDIA, responsible for end-to-end validation of HSIO (PCIe/NVLink) for products, including test planning, automation, bug resolution, and release to production. Requires strong understanding of HSIO protocols, lab equipment, and scripting languages like Python. Focus on ensuring specification compliance and optimal performance for GPU accelerated computing platforms.

What you'd actually do

  1. Own HSIO (PCIe/NVLink) validation of products from start to finish including test plan development, automation, design for validation requirements, resource planning, coverage metrics, test execution, bug resolution, and release to production.
  2. Coordinate with internal and external logic design, circuit design, board design, Simulation, diagnostics, firmware, driver, and marketing teams in different time zones, to ensure our products HSIO subsystem is specification compliant and tuned for optimal workload performance, and to drive the system into production.
  3. Assist in the bring-up of new hardware and solving tough system and board level issues with a focus on HSIO at a system level.
  4. Participate in reviewing board schematics, PCB layouts, and making design and component suggestions.
  5. Ensure interoperability with connected devices and system components in sophisticated interconnect topologies.

Skills

Required

  • BSEE or BSCE or equivalent experience
  • 6+ years or more of experience in HSIO validation
  • In-depth understanding of the HSIO protocol (such as PCI Express, Infiniband, Ethernet), specification, and its operation at a system level.
  • Experienced in the operation of logic and protocol analyzer, and protocol exercisers.
  • Good knowledge of lab equipment (DSOs, BERT, Protocol/Logic analyzers) and Hands-on Post-Si bring up, functional validation, debug, and tuning of HSIO interfaces (such as PCI Express, Infiniband, Ethernet).
  • Outstanding verbal and written communication skills.
  • Proficient in collaborating across teams and suppliers to deliver quality products on tight schedules.
  • Understanding of computing architectures.
  • Coding experience with scripting languages such as Python.

Nice to have

  • Demonstrable experience in PCI Express physical layer and debugging LTSSM failures; familiarity with data link layer and transaction layer.
  • In depth understanding of PCI Express (or similar) protocol and characterization/validation methods in post-silicon environment
  • Excellent knowledge of Signal integrity concepts, Silicon characteristics and high speed/SERDES functional validation
  • Experience with datacenter products including system management, security, networking, and storage.
  • Background with x86/Arm server architectures and accelerated GPU computing.

What the JD emphasized

  • Ability to work on site in hardware lab environment 5 days a week in HQ
  • 6+ years or more of experience in HSIO validation
  • In-depth understanding of the HSIO protocol (such as PCI Express, Infiniband, Ethernet), specification, and its operation at a system level.
  • Good knowledge of lab equipment (DSOs, BERT, Protocol/Logic analyzers) and Hands-on Post-Si bring up, functional validation, debug, and tuning of HSIO interfaces (such as PCI Express, Infiniband, Ethernet).
  • Coding experience with scripting languages such as Python.