Senior Integration Engineer

NVIDIA NVIDIA · Semiconductors · Tel Aviv, Israel

NVIDIA is seeking a Senior Integration Engineer to drive front-end integration of major blocks in a pioneering Ethernet switch ASIC. This role involves building, maintaining, and improving EDA flows and methodologies, working closely with various teams to ensure robust implementation. The engineer will also develop automation and infrastructure to enhance productivity and debug complex issues.

What you'd actually do

  1. Driving front‑end integration of major blocks in a pioneering Ethernet switch ASIC, from RTL handoff through synthesis and signoff checks.
  2. Building, maintaining, and improving EDA flows and methodologies for the Switch org (lint, CDC/RDC, formal, synthesis/ULS, FE‑DCT/FE‑FC and related front‑end signoff flows).
  3. Working closely with logic design and micro‑architecture teams to define integration constraints, clocks/resets, interfaces, and quality targets.
  4. Partnering with DV, BE, and CAD/flow teams to ensure robust, scalable, and efficient front‑end implementation across the project.
  5. Developing automation and infrastructure (scripts, regression flows, dashboards) to improve productivity, and debuggability.

Skills

Required

  • Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
  • 10+ years of experience in front‑end integration, ASIC design, or EDA/methodology for high‑performance semiconductor designs.
  • Hands-on experience with front-end implementation flows: synthesis, STA at FE level, lint, CDC/RDC, formal equivalence, and related signoff checks.
  • Strong familiarity with industry-standard EDA tools (for example: Synopsys Design Compiler / Fusion Compiler, Cadence Genus, CDC/lint/formal tools) and with complex SoC/ASIC build flows.
  • Strong communication and interpersonal skills, and comfort working in a dynamic, global team environment.

What the JD emphasized

  • 10+ years of experience in front‑end integration, ASIC design, or EDA/methodology for high‑performance semiconductor designs.