Senior Manager, Dpu Performance and System Validation

NVIDIA NVIDIA · Semiconductors · Yokneam, Israel

Lead and manage a team of 25+ engineers focused on DPU performance and system validation within the chip development department. Responsibilities include defining and implementing performance verification plans, coordinating emulation and validation, debugging post-silicon performance, and unifying debug processes.

What you'd actually do

  1. Lead and manage a group of 25+ engineers, coordinating two key teams: Performance in DV and Simulation Model, and System Validation.
  2. Collaborate with the ARCH team to define and implement the Performance Verification (PV) Plan, ensuring comprehensive test coverage and platform integration.
  3. Coordinate the performance emulation and functional validation processes, ensuring seamless readiness for TapeOut from a performance perspective.
  4. Participate in post-silicon performance debugging, contributing to the flawless execution of performance improvements.
  5. Develop and unify performance debug processes across all platforms, ensuring consistency and efficiency.

Skills

Required

  • performance management
  • leadership
  • DPU performance
  • system validation
  • ASIC development
  • collaboration
  • B.Sc. in Electrical Engineering, Computer Engineering, or equivalent
  • 15+ years of overall experience in ASIC development/validation
  • 5+ years of management experience

What the JD emphasized

  • performance management
  • system validation
  • ASIC development