Senior Mask Design Engineer - Hardware

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior Mask Design Engineer role at NVIDIA, focusing on physical layout for mixed-signal circuits in advanced CMOS technologies using Cadence tools. Requires expertise in analog circuit layout, verification tools, and scripting languages.

What you'd actually do

  1. Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools.
  2. You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
  3. Take part in floor planning, custom layout and verifying against design rules and schematics.

Skills

Required

  • Mask and Layout Design
  • analog circuit layout concepts
  • Cadence custom circuit design tools
  • virtuoso
  • Dracula
  • Hercules
  • Calibre
  • Prime-yield
  • perl
  • python
  • skill
  • DRC
  • LVS

Nice to have

  • BSEE or equivalent experience
  • work optimally in a team
  • good interpersonal skills
  • passion and positive energy

What the JD emphasized

  • Minimum of 6+ proven experience in Mask and Layout Design
  • Deep understanding of analog circuit layout concepts in submicron CMOS technologies
  • You are an authority with Cadence custom circuit design tools - particularly virtuoso
  • Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Prime-yield
  • Proficient in scripting languages like perl, python, skill etc.
  • Should have knowledge of DRC and LVS checking flows, ability to customize decks