Senior Mask Design Engineer - Hardware

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior Mask Layout Design Engineer responsible for physical layout of mixed-signal functions in state-of-the-art CMOS technologies using Cadence tools. Requires BSEE or equivalent, 7+ years of experience, deep understanding of analog circuit layout, proficiency with Cadence virtuoso and verification tools, and scripting skills.

What you'd actually do

  1. Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools.
  2. You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
  3. Take part in floor planning, custom layout and verifying against design rules and schematics.

Skills

Required

  • BSEE or equivalent experience
  • 7+ years industry experience in Mask and Layout Design
  • Deep understanding of analog circuit layout concepts in submicron CMOS technologies
  • Cadence custom circuit design tools - particularly virtuoso
  • Verification tools such as Dracula, Hercules, Calibre, and Primeyield
  • Scripting languages like perl, python, skill
  • DRC and LVS checking flows
  • Ability to customize decks

Nice to have

  • good interpersonal skills
  • enthusiasm and positive energy

What the JD emphasized

  • Minimum of 7+ years industry experience in Mask and Layout Design
  • Deep understanding of analog circuit layout concepts in submicron CMOS technologies
  • You are an authority with Cadence custom circuit design tools - particularly virtuoso
  • Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield
  • Should have knowledge of DRC and LVS checking flows, ability to customize decks