Senior Memory System Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior Memory System Engineer to join their ASIC Memory Subsystem team. The role involves developing and architecting innovative Memory Solutions for Tegra SoCs, collaborating with various teams (ASIC Architects, Designers, Software, Firmware, SI/PI, Memory suppliers) to design and architect high-speed, low-power memory technology. Responsibilities include analyzing future memory technologies, defining memory module/package/PCB layouts, debugging and bringing up memory evaluation/validation, and collaborating with DRAM suppliers.

What you'd actually do

  1. Analyze future DDR/LPDDR/HBM technologies to determine optimum performance, power, function and RAS in memory for Next generation SOC and Systems.
  2. Collaborate with ASIC Architects, Designers, Software and Firmware SW/FW teams to drive memory technology and associated requirements for memory controllers.
  3. Define Memory module, Package, and PCB layouts appropriate to the system workloads
  4. Debug and bring up memory evaluation / validation and failure issues on memory technology.
  5. Collaborate with DRAM suppliers and industry partners on to develop memory and memory related component technology.

Skills

Required

  • Bachelor's degree or master’s degree in Electrical Engineering, Computer Engineering (CE), or a related field (or equivalent experience)
  • 10 years of proven track record in DRAM design, module design, or memory sub system design.
  • Deep understanding and strong fundamental of memory design, features, ECC algorithm, SI and PI (Training algorithm) in DDR, LPDDR, and HBM.
  • Strong understanding of memory sub system level interaction with Cache, Memory controller and PHY.
  • Experience in the design, bring-up and validation for memory failure analysis
  • Experience with Python, C/C++ for development and memory workload analysis.
  • Strong user documentation and interpersonal skills

What the JD emphasized

  • 10 years of proven track record in DRAM design, module design, or memory sub system design.