Senior Mixed-signal Analog Cad Engineer

NVIDIA NVIDIA · Semiconductors · Yokneam, Israel

NVIDIA is seeking a Senior Mixed-Signal Analog CAD Engineer to support and develop solutions for mixed-signal circuit and mask designers. The role involves defining, developing, and maintaining in-house and industrial utilities for schematic, layout, package, and physical verification using tools like Cadence Virtuoso, Mentor Calibre, and Synopsys ICV. Responsibilities include writing and debugging ICV/Calibre runsets, SKILL coding and Pcells development, and scripting for ad-hoc solutions. The ideal candidate will have at least 5 years of experience with Cadence tools, SKILL language, and debugging DRC/LVS with verification tools.

What you'd actually do

  1. Support and develop solutions that will improve the efficiency and quality of the Mixed-Signal group.
  2. Define, develop, and maintain in-house, along with industrial utilities, solutions for Schematic, Layout, Package and Physical-verification in the fields of costume and EDA vendor tools (Cadence Virtuoso, Mentor Calibre, Synopsys ICV and more), environment, and general-purpose solutions.
  3. Write, customize and debug ICV/Calibre runsets of DRC, LVS, EXT.
  4. SKILL coding including Pcells development.
  5. Scripting and programing for ad-hoc solutions and wide tasks solutions.

Skills

Required

  • Minimum of 5 years of meaningful experience and a relevant education
  • Experience with Cadence custom circuit design tools and SKILL language.
  • Experience running and debugging DRC and LVS with verification tools such as ICV, Calibre.
  • Effectively teamwork, good interpersonal skills, passion, and positive energy.
  • Very good English.

Nice to have

  • Former experience as mask designer or Mixed-Signal / VLSI CAD engineer
  • Problem solver - balanced combination of experience and creativity.
  • Proficiency in programming languages like Python, SKILL
  • DRC and LVS flows experience, ability to customize its decks
  • Understanding of analog circuit layout concepts in submicron CMOS or Photonics technologies and AI/ML hands on experience

What the JD emphasized

  • Experience with Cadence custom circuit design tools and SKILL language.
  • Experience running and debugging DRC and LVS with verification tools such as ICV, Calibre.