Senior Mixed-signal Design Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior Mixed-Signal Design Engineer to verify the design and implementation of GPUs and SoCs. The role involves verifying mixed-signal CMOS circuit designs, architecture, and golden models using advanced verification methodologies. The engineer will work closely with multi-functional teams and be responsible for defining verification scope, developing infrastructure, and ensuring design correctness. Experience with deep sub-micron process design, Cadence tools, System Verilog, and analog circuit simulation is required.

What you'd actually do

  1. As a key member of our circuit verification team, you will verify the design and implementation of the industry's leading GPU
  2. Be responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification methodologies
  3. Understand sophisticated mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design
  4. You'll closely with multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasks

Skills

Required

  • Bachelors Degree in EE, CS or CE (or equivalent experience)
  • 5+ years of proven experience
  • Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design
  • Skilled using design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
  • Experience in crafting test bench environments for component and top level circuit verification
  • Expertise in System Verilog or similar HVL
  • Strong debugging and analytical skills

Nice to have

  • Perl and C/C++ programming language experience desirable
  • Strong interpersonal skills and ability & desire to work as a great teammate are huge plus

What the JD emphasized

  • 5+ years of proven experience
  • Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design
  • Skilled using design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
  • Experience in crafting test bench environments for component and top level circuit verification
  • Expertise in System Verilog or similar HVL