Senior Package Layout Engineer

NVIDIA NVIDIA · Semiconductors · Yokneam, Israel

NVIDIA Networking is seeking a Senior Package Layout Engineer to design state-of-the-art high-speed Interconnect systems for Supercomputers and Datacenters. The role involves developing complex IC substrate layouts using Cadence APD/SiP tools, optimizing pin-outs, and improving layout methodologies. Collaboration with SI/PI/HW design teams and product teams is essential, as is project leadership from start to finish.

What you'd actually do

  1. As part of a IC Packaging design team, you will collaborate to implement high speed and PDN design for ASIC packages.
  2. Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using Cadence APD (Allegro) or SiP tools.
  3. Optimize package pin out incorporating system level trade-offs of pins assignment.
  4. Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations.
  5. In close co-operation with the SI/PI/HW design teams and product teams
  6. Planning, ensuring stakeholder management and leading projects from start to finish

Skills

Required

  • B.Sc. Electrical Engineering or an Electrical Practical Engineer certificate or equivalent experience
  • 5+ years hands-on in Package/PCB Layout and outing experience
  • high speed design signal integrity practices
  • Cadence Virtuoso and APD (Allegro) or SiP and/or other PCB layout tools

Nice to have

  • Experience in substrate layout of wire bond and flip chip packages
  • Knowledge in substrates or board manufacturing process
  • Knowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools
  • Familiarity with Skill language (Cadence)
  • basic parsing abilities (Python/Perl/Shell-scripting)

What the JD emphasized

  • 5+ years hands-on in Package/PCB Layout and outing experience; including high speed design signal integrity practices.
  • Significant background with Cadence Virtuoso and APD (Allegro) or SiP and/or other PCB layout tools