Senior Physical Design Backend Engineer

NVIDIA NVIDIA · Semiconductors · Tel Aviv, Israel

NVIDIA is seeking a Senior Physical Design Engineer for their Networking Silicon Engineering team. The role involves the physical design of high-speed communication devices, focusing on power, area, and performance. Responsibilities include RTL2GDS flows, synthesis, place and route, timing closure, power/noise analysis, and physical verification. Requires 5+ years of experience in physical design, knowledge of PNR, STA, physical verification, and familiarity with EDA tools.

What you'd actually do

  1. Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
  2. Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
  3. Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
  4. Taking part in flows development.

Skills

Required

  • Physical Design
  • RTL2GDS flows and methodologies
  • PNR
  • STA
  • Physical verification
  • Physical construction and Integration
  • Physical Design Verification methodology LVS/DRC
  • EDA tools (Synopsys, Cadence)

Nice to have

  • B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience
  • Great teammate

What the JD emphasized

  • 5+ years of experience in Physical Design
  • Proven experience in RTL2GDS flows and methodologies
  • Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
  • Deep understanding of all aspects of Physical construction and Integration
  • Strong background of Physical Design Verification methodology LVS/DRC
  • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc)