Senior Physical Design Backend Engineer

NVIDIA NVIDIA · Semiconductors · Yokneam, Israel

Senior Physical Design Backend Engineer for NVIDIA's Networking Silicon Engineering team, focusing on high-speed communication devices. Responsibilities include physical design of blocks, resolving complex timing and congestion issues, and daily work across RTL2GDS flows (synthesis, place and route, timing closure, power analysis, physical verification). Requires 5+ years of experience in Physical Design, proven RTL2GDS flow experience, knowledge of PNR, STA, physical verification, and familiarity with EDA tools.

What you'd actually do

  1. Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
  2. Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
  3. Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
  4. Taking part in flows development.

Skills

Required

  • Physical Design
  • RTL2GDS flows
  • PNR
  • STA
  • Physical Verification
  • LVS/DRC
  • EDA tools (Synopsys, Cadence)

Nice to have

  • high-speed communication devices
  • low latency

What the JD emphasized

  • 5+ years of experience in Physical Design
  • Proven experience in RTL2GDS flows and methodologies
  • Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
  • Deep understanding of all aspects of Physical construction and Integration
  • Strong background of Physical Design Verification methodology LVS/DRC
  • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc)