Senior Physical Design Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA +1

Senior Physical Design Engineer responsible for the physical design and implementation of GPUs and other ASICs, including floorplan, power/clock distribution, assembly, P&R, and timing closure. Requires extensive experience with VLSI physical design on advanced process nodes and proficiency with relevant CAD tools.

What you'd actually do

  1. Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.
  2. As a member of a team, we will all participate in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure.
  3. Craft designs for static timing analysis, power and noise analysis and back-end verification.

Skills

Required

  • BSEE (MSEE preferred) or equivalent experience
  • 8+ years of experience in large VLSI physical design implementation on 5nm, 4nm and 3nm technology
  • successful track record of delivering designs to production
  • Deep understanding of custom macro blocks such as RAMs, CAMs, high-speed IO drivers, PLLs
  • Confirmed prior experience in timing closure, clock/power distribution and analysis, RC extraction and correlation, place/ route and tapeout solutions
  • strong analytical and debugging skills

Nice to have

  • Power, Performance and Area improvement Initiatives
  • Proficiency using Python, Perl, Tcl, Make scripting

What the JD emphasized

  • successful track record of delivering designs to production is a requirement