Senior Physical Design Methodology Engineer, Innovus Flows

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA +2 · Remote

This role focuses on developing and improving physical design methodologies for NVIDIA's chips, including GPUs and processors. While it mentions using AI/ML approaches to enhance CAD tools and design performance, the core function is in physical design engineering, not directly building AI models or systems.

What you'd actually do

  1. Developing innovative physical design methodologies for implementation of GPU, CPU, Network processors and SOC, with emphasis on PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes
  2. Work with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all our product lines
  3. Use AI/ML approaches to CAD to improve design performance and turnaround time, while improving efficiency and productivity of designers

Skills

Required

  • MS in Electrical or Computer Engineering (or equivalent experience)
  • 7 years of experience in Physical Design
  • Strong understanding of physical design optimization and routing methodologies
  • Strong background in STA, extraction, timing and RC correlation
  • Experience in low power design with UPF
  • Solid understanding of EM and IR analysis and closure
  • Understanding of synthesis, hierarchical design, pinning and budgeting flows
  • Experience with power distribution networks, Design for Yield and Manufacturability and thermal management
  • Expertise and in-depth knowledge of industry standard EDA tools
  • Proficiency in programming and scripting languages, such as TCL, Perl, Python, and C++

Nice to have

  • Experience applying ML models, LLMs, and agentic AI techniques to EDA/PD problems (analytics, prediction, optimization)
  • Proficiency with data analysis/ML libraries (e.g., NumPy, SciPy, scikit-learn, PyTorch, etc.)
  • Proficiency in Cadence EDA tool suite – Innovus/genus/tempus/quantus/joules etc.

What the JD emphasized

  • Minimum 7 years of experience in Physical Design
  • Proven track record of PPA improvement on high performance and low power designs in advanced technology nodes
  • Strong understanding of physical design optimization and routing methodologies at place, cts, route and postroute, especially power and area efficient setup and hold optimization