Senior Platform Safety Analysis Engineer, Halos Platforms - Autonomous Vehicles

NVIDIA NVIDIA · Semiconductors · SC +2 · Remote

Senior Platform Safety Analysis Engineer for NVIDIA's autonomous vehicle HALOs platform, focusing on functional safety of AI-powered compute and communications infrastructure. Responsibilities include analyzing HW fault metric compliance, developing automation for system analysis, and ensuring integration of safety methodologies to meet challenging safety targets in a regulated automotive environment.

What you'd actually do

  1. The increased use of AI and the underlying compute HW used represent a challenge to analyze and demonstrate HW fault metric compliance, we will look to you to propose new methods and refine existing practices.
  2. You will carry out analysis using classical approaches such as fault trees used alongside model-based techniques to derive application and system-level diagnostic measures on top of existing HW measures.
  3. Development of automation to support the analysis of complex multi-layered systems will be required.
  4. Analysis and interpretation of internal and external safety documentation to identify improvements which can be helpful to meet ever more challenging safety targets.
  5. Ensure the integration of the System, Software and Hardware safety analysis methodologies to demonstrate the final system meets overall HW safety metrics.

Skills

Required

  • BS, MS or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience
  • 12+ years of experience in systems architecture or related fields
  • Experience working across company boundaries as development partners
  • Technically strong engineers who bring experience in safety analysis of embedded systems at the Hardware and Software Level and can find the right level of abstraction adapted to the tasks in hand.

Nice to have

  • Proven competence in performing safety analysis using qualitative and quantitative methods (e.g FTA, FMEA and FMEDAs)
  • Background in HW SOC and/or board level architecture, Automotive ECU architecture is especially valued.
  • Demonstrable competence in tools and automation focused on safety analysis.
  • Familiarity with safety standards (ISO 26262, IEC 61508, ISO/PAS 21448)
  • Experience in the evaluation of fault metrics through the combination of built-in HW measures and application coverage.

What the JD emphasized

  • functional safety
  • AI-powered autonomous driving platforms
  • HW fault metric compliance
  • safety analysis
  • ISO 26262
  • IEC 61508
  • ISO/PAS 21448

Other signals

  • AI-powered autonomous driving platforms
  • functional safety of the underlying compute and communications platform
  • analysis and demonstrate HW fault metric compliance
  • development of automation to support the analysis of complex multi-layered systems