Job Details:
Job Description:
Intel Israel has an opening for a Senior DFT Design Engineer focused on post-Silicon product design enabling and optimization. This position is in Intel’s “center of excellence” for Silicon debug supporting Client products. This team resolves product quality and performance issues blocking products from meeting production requirements with a combination of design and manufacturing problem solving expertise, leveraging state of the art methodologies & tools. This team is a critical deep portfolio and scaling it going forward.
Qualifications:
BSC or MSC degree in Engineering
Previous experience in semiconductor circuit design.
Strong verbal and written communication skills (English).
Hands-on, self-motivated problem solver.
Knowledge of DFT (Design for Test), previous experience in Array and Scan infrastructure, Design and Post Si enabling.
previous experience in the following could be an advantage:
- Scan and Array insertion with Mentor/Synopsys tools
- Scan and Array Pre/Post Si validation and Si enabling
- Debug of Si issues using Scan/Array/JTAG/TAP
- Debug yield loss by using SCAN and Array diagnosis
Further advantages:
Power-on and reset flow.
Digital circuit design methodology.
Design structural & functional diagnosis tools & methods.
Job Type:
Experienced Hire
Shift:
Shift 1 (Israel)
Primary Location:
Israel, Haifa
Additional Locations:
Business group:
The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.