Senior Resiliency and Safety Architect

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior Resiliency and Safety Architect to support the development of GPU and Tegra SoC hardware and software resiliency and safety features. The role involves architecting new features, optimizing hardware & software, modeling RAS and safety metrics, running simulations, developing diagnostics software, and ensuring compliance with functional safety standards like ISO 26262 and ASPICE. While the company is heavily involved in AI, this specific role focuses on the underlying hardware and software resiliency and safety, not direct AI model development.

What you'd actually do

  1. Collaborate with the Software and Hardware teams to architect new safety and resiliency features and guide future development.
  2. Optimize hardware & software features to improve system robustness, performance, and security.
  3. Model and analyze RAS metrics like Failures in Time and Availability; and Safety metrics like Diagnostic Coverage and PMHF
  4. Run simulations to analyze Architectural Vulnerability Factor and Liveness of on-die memory
  5. Develop diagnostics software components for Resiliency and Safety to run on NVIDIA GPUs.

Skills

Required

  • Master’s or PhD degree in Computer Science, Computer Engineering, Electrical Engineering or closely related degree or equivalent experience.
  • At least 5+ years of relevant experience.
  • Familiarity with computer system architecture, microprocessors, and microcontroller fundamentals (caches, buses, direct memory access, etc.).
  • Proficiency in C/C++.
  • Scripting and automation with Python or similar.
  • Understanding of the software development process, from requirements to testing closure and maintenance.
  • Experience with resiliency and/or functional safety.
  • Excellent interpersonal skills and ability to collaborate with on-site and remote teams.
  • Strong debugging and analytical skills.
  • Be self-driven and results oriented.

Nice to have

  • Familiarity with general HW concepts, Verilog RTL coding and simulations/debug, GPU and SOC Architectures, and Machine Learning/Deep Learning concepts
  • Programming with CUDA
  • Experience in embedded software development.

What the JD emphasized

  • compliance of products with functional safety standards (ISO 26262 and ASPICE (Automotive SPICE))
  • performing safety analyses - FMEA/DFA/FTA
  • ensuring compliance of software to MISRA and Cert-C standards