Senior Rtl Design Engineer

AMD AMD · Semiconductors · Hyderabad, India · Engineering

This role is for a Senior RTL Design Engineer at AMD, focusing on the front-end design and integration of Server SoC chips. The engineer will work with architects and IP design teams to define micro-architecture, implement SoC features, and ensure RTL quality. Experience with Verilog, scripting, and SoC design aspects is preferred.

What you'd actually do

  1. Work with SoC Architects, IP Design Teams and define micro architecture that includes clocking, reset, IO, Fuse; Implement SoC Design features/blocks, own connectivity across IP's
  2. Work with Physical Design Team and deliver/triage all collaterals required for PD and implement SoC topology networks based on Full Chip floorplan and other Physical Design requirements
  3. Own and drive RTL Quality checks/Audit that includes Lint/CDC/VCLP/Connectivity

Skills

Required

  • Verilog
  • Perl/Shell scripting
  • RTL quality checks

Nice to have

  • SoC Design aspects (Clocking, IO, Latency, Reset, Fuse map, SoC Topology Networks)
  • SoC Integration activities
  • Micro architecture definition