Senior Se-mem Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

This role focuses on supporting high-volume, fast-ramp data center productions, specifically involving sophisticated HBM technologies. Responsibilities include partnering with MEM suppliers for process improvement, device optimization, electrical test analysis, and process/Fab qualifications. The role also involves communicating with internal engineering departments and suppliers for integration and advancement, applying knowledge of DRAM testing and circuits, and contributing to datacenter ATE and system-level performance upgrades. Key activities include driving consistency with standard monitoring practices like SPC, EFR, DPPM, and RMA.

What you'd actually do

  1. Partnering with MEM suppliers to conduct process improvement efforts involving engineering data examination. These efforts include device optimizations, detailed process weakness improvements, electrical test analyses, and process and Fab qualifications.
  2. Communicating clearly with internal engineering departments and MEM suppliers to secure smooth integration and process advancement.
  3. Applying your engineering knowledge of DRAM Testing and working with DRAM circuit and physical build. Candidates with HBM experience will have a distinct advantage.
  4. Contributing to datacenter ATE and system-level performance, yield, and reliability upgrades by partnering closely with MEM suppliers.
  5. Driving consistency with standard monitoring practices, including SPC, EFR, DPPM, and RMA.

Skills

Required

  • MSEE/PhD or equivalent experience
  • 8+ years of relevant experience
  • Proven experience in a DRAM manufacturing environment
  • Good understanding of deep-sub micron device physics and advanced processes of HBM, Build to Product Engineering, checking items, and landmark setting of new HBM bring-up
  • Ability to prioritize and coordinate multi-discipline projects in a timely manner
  • Strong data analysis, problem-solving, communication, and managerial skills
  • Knowledge in statistics, DRAM process technology, DRAM test algorithms, device physics, and IC manufacturing

Nice to have

  • Hands-on experience collaborating with MEM suppliers is a plus

What the JD emphasized

  • HBM technologies
  • HBM experience
  • HBM bring-up