Senior Silicon Validation Engineer, Volume Production and Yield

Google Google · Big Tech · New Taipei, Banqiao District, New Taipei City, Taiwan +1

This role focuses on silicon validation for high-volume production and yield optimization. While it leverages AI/ML tools for data analytics and yield improvement, the core function is hardware engineering and manufacturing, not the direct development or research of AI models themselves. The role involves transitioning silicon designs into manufacturing, monitoring yield, performing failure analysis, and collaborating with cross-functional teams to ensure product quality and efficiency.

What you'd actually do

  1. Provide technical guidance and expertise for volume productization and post-silicon yield enhancement. Define and deliver silicon screening packages to factory organizations.
  2. Execute and refine the silicon yield management strategy, leading failure analysis, root cause debug of limiters, and production data analysis. Leverage AI/ML tools to automate yield analysis and streamline failure debug.
  3. Engage with cross-functional partners (SiVal, Design, DV, PDTE, Operations, external factory teams) to meet stringent yield goals and resolve critical manufacturing challenges.
  4. Establish processes for screening package releases, data acquisition, and failure analysis protocols. Proactively identify risks and key opportunities for yield across the product lifecycle, from NPI through mass production.
  5. Communicate technical status, risks, and solutions clearly to cross-functional stakeholders and engineering leadership.

Skills

Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 8 years of experience in silicon development, including post-silicon validation, product engineering, test engineering, or yield analysis.
  • Experience leading a technical project or sub-team.
  • Experience with embedded systems, firmware, or core software development environments (e.g., C, Python).
  • Experience with semiconductor manufacturing methodologies, silicon test processes (e.g., ATE, SLT), and fault isolation techniques.

Nice to have

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience with delivering technical impact to launch silicon products into high volume manufacturing pipelines.
  • Experience with the failure analysis and debug of complex Systems on Chip (SoCs).
  • Experience with a broad range of compute platforms and SoCs (e.g., dedicated mobile or specialized AI processors).
  • Experience applying AI/ML models, statistical methods, and data analysis for silicon yield optimization.
  • Excellent problem-solving, people management, and written and verbal communication skills.

What the JD emphasized

  • high-volume factory manufacturing
  • silicon yield monitoring
  • failure analysis
  • voltage margin characterization
  • AI-driven data analytics
  • machine learning techniques to optimize yield
  • accelerate failure debug
  • enhance overall silicon quality
  • silicon test processes
  • fault isolation techniques
  • failure analysis and debug of complex Systems on Chip (SoCs)
  • applying AI/ML models, statistical methods, and data analysis for silicon yield optimization