Senior Soc Methodology Architect, Vlsi Physical Design

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

This role is for a Senior SoC Methodology Architect at NVIDIA, focusing on the physical design of chips, including floorplanning, feasibility analysis, placement, and routing. The architect will collaborate with chip architects and EDA tool developers to optimize chip development processes and ensure successful tape-outs for advanced hardware, including those used in AI systems. The role requires a strong hardware engineering background, experience with EDA tools, and programming skills in Python, Perl, and C/C++.

What you'd actually do

  1. Define and optimize top-level floorplan, including die size estimation, route planning and hierarchy definition and efficient partitioning
  2. Drive internal tools and top-level floorplan methodologies for chip automation
  3. Facilitate rapid analysis, and ensure the efficient execution of new chips on advanced process technologies.
  4. Collaborate with tool developers, architects, designers, and the top-level integration team to proactively identify and resolve issues.
  5. Examine and evaluate floorplans to detect potential issues and explore automated solutions.

Skills

Required

  • BS, MS, in Electrical Engineering, Computer engineering, Computer Science or equivalent experience
  • A deep hardware engineering background with a concentration in chip floorplan, placement, routing and design analysis
  • Experience with EDA tools, floorplanning and physical design methodologies (flow and tool development)
  • 4+ years of relevant work experience
  • Strong problem solving and analysis skills
  • Understanding of Verilog and synthesis
  • Python, Perl and C/C++ programming language experience
  • Strong communication and interpersonal skills

Nice to have

  • Experience in chip-level floor planning and physical design
  • Familiarity in Python scripting and development
  • Experience in collaborating across multiple teams
  • A tenacity for solving complex challenges

What the JD emphasized

  • deep expertise in EDA tool application
  • world-class physical design execution
  • deep hardware engineering background
  • expertise in floorplanning, early feasibility analysis, placement, routing, and methodology development