Senior Soc Pre-silicon Verification Engineer

Intel Intel · Semiconductors · Guadalajara, Mexico

Senior Pre-Silicon Verification Engineer responsible for functional logic verification of an integrated SoC, defining and developing verification plans, test benches, and environments. The role involves executing verification plans, running emulation and simulation models, debugging issues, and collaborating with cross-functional teams. It also includes incorporating security activities and maintaining verification infrastructure.

What you'd actually do

  1. Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
  2. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
  3. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
  4. Replicates, root causes, and debugs issues in the presilicon environment.
  5. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.

Skills

Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science or a related field with 5+ years of experience in Industry-standard or Master's degree with 4+ years of experience.
  • Hardware description languages such as Verilog or VHDL and verification tools like UVM or System Verilog or relevant experience in Silicon Validation.
  • Simulation or emulation tools, debugging scripts, and functional coverage analysis
  • Advance English level.

Nice to have

  • Advanced academic or professional experience contributing to complex CPU or SoC design projects
  • A passion for innovation and a drive to contribute to industry-leading solutions
  • 4+ years SystemVerilog and UVM experience
  • 4+ years Python for test automation
  • C/C++ and scripting proficiency (Perl, Tcl, Shell)
  • 2+ years with simulation tools (VCS, Xcelium, Questa)
  • Formal verification tools and coverage analysis
  • Constrained random and assertion-based verification
  • 3+ years ARM-based SoC or equivalent architectures
  • AMBA protocols (AXI, AHB, APB) and interconnects
  • Memory subsystems, cache coherency, power management
  • High-speed interfaces (PCIe, DDR, USB, Ethernet)
  • 3+ years pre-silicon verification experience
  • Linux/Unix and version control (Git, Perforce)
  • Regression testing and CI/CD pipelines
  • Security verification methodologies
  • Experience in some or all aspects of pre-silicon functional verification, including planning, debug, testbench design, UPF and coverage closure

What the JD emphasized

  • Must have unrestricted, permanent right to work in Mexico