Senior Software Engineer, Chip Simulation Infra

NVIDIA NVIDIA · Semiconductors · Beer Sheva, Israel

Develop and maintain simulation infrastructure components for NVIDIA's high-performance networking chips and GPUs. This role involves defining, implementing, and validating simulations, optimizing CI/CD, and collaborating with hardware and software teams to simulate complex behaviors.

What you'd actually do

  1. Develop and maintain simulation infrastructure components for different simulation teams (GPUs, switches, NVLink, Ethernet, PHY) of NVIDIA’s high-performance networking chips.
  2. Define, implement, and validate simulations of core infra features, improve performance, maintain multi processes and multi-threaded IPC mechanisms (sockets, queues etc.), define architecture and the building blocks of the simulation.
  3. Own, extend and optimize all the CI/CD of the simulation team, starting from servers’ installation to adding and maintaining various Jenkins jobs that help developer and improve their life.
  4. Collaborate with chip architects, firmware developers, and hardware design teams to accurately simulate complex behaviour in software.
  5. Support internal users by debugging simulation flows and collaborating on bug resolution.

Skills

Required

  • Python
  • C/C++
  • Object-oriented design
  • Linux systems
  • CI/CD
  • Automation frameworks
  • Jenkins
  • Git
  • Docker
  • Pytest
  • Inter-Process Communication (IPC)
  • Sockets
  • Message queues
  • Shared memory
  • Debugging (gdb)
  • Concurrency issues

Nice to have

  • Simulation or emulation systems
  • Hardware behavior simulation
  • Multi-platform systems (HW, FW, SW)
  • Low-level networking protocols and applications

What the JD emphasized

  • 5+ years of experience in Python, C/C++ programming
  • Experience debugging using debuggers (gdb), including concurrency issues (races, deadlocks...)
  • Strong background with Linux systems, CI/CD pipelines – and automation frameworks (e.g., Jenkins, Git, Docker, Pytest).
  • Familiarity with Inter-Process Communication (IPC) mechanisms (sockets, message queues, shared memory...).