Senior Sram Circuit Design Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior SRAM Circuit Design Engineer at NVIDIA, focusing on the design, verification, and characterization of next-generation SRAM for advanced processor designs in cutting-edge technologies. Responsibilities include transistor-level circuit design, optimization for power/timing/area/yield, layout floorplanning, timing characterization, and verification using Verilog/VHDL. Requires MS in Electrical/Computer Engineering or equivalent, 6+ years of experience, and strong background in deep submicron processes, SRAM design, and ASIC flows.

What you'd actually do

  1. Work on the state of the art processor design in advanced technologies, and on the design, verification and characterization of SRAM
  2. Drive the concepts of the transistor level circuit design, modeling and performance analysis process and optimize design for power, timing, area and yield
  3. You'll make the layout floorplan and work with layout designers to optimize it for power and performance
  4. Collaborate with the support development of tools using Perl/Python
  5. Develop and Perform timing characterization and circuit verification

Skills

Required

  • MS in Electrical or Computer Engineering or equivalent experience
  • 6+ years of relevant experience
  • Strong background in deep submicron process issues
  • Proven experience on transistor-level circuit design and circuit behavior analysis
  • Deep background of the design, verification and characterization of SRAM/caches
  • Strong understanding on generating performance/power/margin data of SRAM, validation of data and QA process
  • Familiar with EMIR/Aging/Self heating and their impacts to circuit/layout implementations and signoff flows
  • Expert with ASIC design semi-custom and full-custom flow
  • Hands-on experience running SPICE simulation, and capability to adapt to new simulation tools
  • Great team-work, communication and analytical skills

Nice to have

  • scripting language, such as, Perl, Tcl, Make, and automation methods/algorithms a certain plus

What the JD emphasized

  • SRAM
  • design, verification and characterization of SRAM
  • transistor-level circuit design
  • SRAM/caches
  • SRAM