Senior System Asic Engineer - Speed and Reliability

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior System ASIC Engineer to join their Silicon Solutions Group. This role involves architecting and delivering innovative solutions for various markets by optimizing NVIDIA's chips. The engineer will be responsible for understanding chip HW features, developing characterization and validation strategies, driving new feature testing methodology, and designing tools and scripts for automation. The role requires collaboration with cross-functional teams to bring industry-defining products to market, focusing on performance, power optimization, and management techniques. The ideal candidate will have experience with silicon bringup, PPA, data analysis tools, and scripting.

What you'd actually do

  1. Understand chip HW features and intersection with speed characteristics. Develop state-of-art characterization/validation strategies for these features.
  2. Understand new silicon features and create internal characterization plans to validate benefits, functionality, etc.
  3. Driving new feature testing methodology initiatives and implementation plan across multiple business units, translate hardware features design requirements to silicon speed characterization needs and test requirements for Productization.
  4. Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability specialists, DFx engineers, ATE engineers, product managers, sales, and operations, in a multifaceted, high-energy work environment to bring industry-defining products to market.
  5. Designing tools and scripts to automate characterization, data collection, test case execution, and results analysis.

Skills

Required

  • MS in EE, CE, Systems Engineering (or equivalent experience)
  • 4+ years of experience in a related hardware engineering position.
  • Silicon bringup
  • Frequency and power characterization
  • PPA in Pre-Silicon or Post-Silicon phases
  • Tester-to-system correlation
  • JMP or equivalent data analysis tools
  • Lab tools (oscilloscopes, multimeters, DAQ)
  • Scripting with Perl/ Python
  • Windows, Linux, and Android OS environments

Nice to have

  • Statistical methods and tools for data analysis
  • Go-getter, can get it done attitude
  • Independent 'out-of-box' thinking

What the JD emphasized

  • MS in EE, CE, Systems Engineering (or equivalent experience)
  • 4+ years of experience in a related hardware engineering position.
  • Previous experience with silicon bringup, frequency and power characterization, PPA in Pre-Silicon or Post-Silicon phases, tester-to-system correlation, JMP or equivalent data analysis tools and lab tools (oscilloscopes, multimeters, DAQ).
  • Scripting experience with Perl/ Python.