Senior System Design Test Architect

NVIDIA NVIDIA · Semiconductors · Yokneam, Israel

NVIDIA is looking for a Senior System Design Test Architect to join their Product Engineering group. The role involves developing and deploying automatic testers for network business units, analyzing manufacturing data using ML/AI to prevent quality issues, leading production and capacity enlargement, and performing failure analysis. The architect will define systems HW testability, lead testing definitions for HW, SW, FW, and fixtures, and influence product design from a DFT perspective. The role requires a BSc/MSc in Electrical Engineering, experience as a DFT engineer, and background with contract manufacturers.

What you'd actually do

  1. Leading optimal products testing definitions includes: HW, SW, FW, Mechanical fixtures, and cables/harnesses for customized production testing set ups.
  2. Making pitches in front of large audience a new product testing architecture, DFT and testing method while providing justifications for the testing concept.
  3. Responsible for product testing maximum coverage, Testing specification documents and production test flow process for each system
  4. Working with Company’s engineering team during the developing process of the product from pre-design trough the design and influence on the product design from DFT – design for testability aspects.
  5. Supporting production ramp up and scalability, lead and fast responding time for ECR/ECO implications.

Skills

Required

  • BSc, MSc Electrical Engineering
  • Integration capabilities of self-task management
  • Vast electronic knowledge
  • Production and testing process knowhow
  • Background in working with contract manufacturers and suppliers
  • Minimum 5 years of experience as a DFT engineer at chip/system level, as Board Design engineer or as system architect
  • Management and follow up till completion of multi-functional and personal tasks.
  • Proactive and self-instruction
  • Good interpersonal relationship
  • Multitasking
  • Well organized
  • Quick learner

What the JD emphasized

  • Minimum 5 years of experience as a DFT engineer at chip/system level, as Board Design engineer or as system architect