Senior Verification Engineer - Hardware

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior Verification Engineer to join their Emulation division. The role involves supporting emulation environments, bringing up SOCs, and debugging issues. Requires proficiency in Verilog/VHDL, C/C++, SystemVerilog, UVM, and scripting languages like Python. Experience with hierarchical design and system-level verification is essential.

What you'd actually do

  1. Support multiple emulation environments using the latest emulation techniques (C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, Accelerated UVM Testbenches).
  2. Bring up SOCs on emulation, root causing SoC/Processor test fails and emulator environment issues.
  3. Continual collaboration with Design, DV, Power, Silicon Validation, Performance, and Software teams.
  4. Work constructively leading emulation vendors to debug issues using various tools.

Skills

Required

  • Verilog
  • VHDL
  • C/C++
  • SystemVerilog
  • UVM
  • Python
  • Perl
  • hierarchical design
  • top-down design
  • SoC verification
  • system level verification

What the JD emphasized

  • 3+ years of proven experience
  • proficient in Verilog and/or VHDL, C/C++ and SystemVerilog
  • Experience with UVM verification environments and scripting with Perl, Python and C/C++ is essential
  • Be familiar with hierarchical design approach, top-down design, SoC and system level verification