Senior Verification Engineer, Memory Subsystem

NVIDIA NVIDIA · Semiconductors · Bangalore, India

Senior Verification Engineer role focused on verifying the ASIC design, architecture, and micro-architecture of the GPU memory subsystem using advanced verification methodologies. Responsibilities include defining verification scope, developing infrastructure, and ensuring correctness through functional coverage and performance verification.

What you'd actually do

  1. Responsible for verifying the ASIC design, architecture and micro-architecture using advanced verification methodologies.
  2. Expected to understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
  3. Come up with test plans, tests and verification infrastructure for complex IPs/sub-systems.
  4. Responsible for performance and deadlock verification of the GPU memory subsystem unit.
  5. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.

Skills

Required

  • B.Tech./ M.Tech. with 4+ years of relevant experience
  • Experience in verification of complex IPs/units and sub-systems
  • Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies
  • Expertise in Verilog
  • Knowledge in SystemVerilog or similar HVL
  • Familiarity with verification methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug

Nice to have

  • Experience in memory subsystem or network interconnect IP verification
  • Good debugging and analytical skills
  • Scripting knowledge (Python/Perl/shell)
  • Good communication skills & dream to work as a great teammate

What the JD emphasized

  • verification of complex IPs/units and sub-systems
  • memory subsystem or network interconnect IP verification