Senior Verification Engineer, Pcie

NVIDIA NVIDIA · Semiconductors · Hyderabad, India

Senior Verification Engineer to verify the design and implementation of PCI Express controllers for GPUs and SOCs, using UVM and state-of-the-art verification methodologies.

What you'd actually do

  1. Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM.
  2. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
  3. Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.
  4. You will be collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks.

Skills

Required

  • Verilog
  • SystemVerilog
  • UVM
  • VMM
  • PCI Express protocol verification
  • IP/sub-system/SOC level verification
  • Functional coverage
  • Constrained random verification

Nice to have

  • PCIe Gen3 and above
  • CXL-based designs
  • Perl
  • Python
  • Scripting
  • SW programming language

What the JD emphasized

  • B.Tech./ M.Tech or equivalent experience
  • 5+ years of relevant experience
  • Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog
  • Expertise in comprehensive verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)
  • Experience in developing and working in functional coverage based constrained random verification environments
  • Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug