Signoff Methodology Engineer - New College Grad 2026

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Signoff Methodology Engineer to help drive multi-physics sign-off strategies for GPUs and SoCs, optimizing performance, yield, and reliability through modeling, analysis, and automation. This role influences next-generation computing across various NVIDIA product lines, including AI.

What you'd actually do

  1. Improve and validate flows for Prime-Time, Prime-Shield and Tempus STA QoR metrics for sign-off flow, and tool for high-speed designs, with focus on CAD and automation.
  2. Develop custom flows for validating QOR of ETM models, both of std cells and custom IPs.
  3. Develop flows/recommendations on STA sign-off to model deep submicron physical effects aging, self-heating, thermal impact, IR drop etc.
  4. Collaborate with technology leads, VLSI physical design, and timing engineers to define and deploy the most sophisticated strategies of signing off timing in design for world-class silicon performance.
  5. Develop tools, and methodologies to improve design performance, predictability, and silicon reliability beyond what industry standard tools can offer.

Skills

Required

  • Master's or PhD in Electrical or Computer Engineering (or equivalent experience).
  • Shown problem solving skills.
  • Python programming experience.
  • Experience developing and maintaining automated regression tests.
  • Knowledge of VLSI concepts like CMOS design, clocking, and timing of synchronous circuits.
  • Understanding of mathematics/physics fundamentals of circuit design.
  • Familiarity with Clocking specs: jitter, IR drop, crosstalk, spice analysis.

Nice to have

  • Programming experience in Perl and TCL is a plus.
  • Experience collaborating across multiple teams simultaneously.