Silicon Packaging Design Engineer

Intel Intel · Semiconductors · Arizona, Phoenix, United States +1

This role is for a Silicon Packaging Design Engineer at Intel Foundry Services, focusing on the end-to-end development of advanced substrate designs. Responsibilities include physical layout, routing, substrate fit studies, defining design rules, and collaborating with cross-functional teams to optimize designs for performance, cost, and manufacturability. The role requires experience with package design tools and physical layout aspects of substrate design.

What you'd actually do

  1. Drive the physical layout and routing of package designs, ensuring alignment with silicon, package, and board performance requirements.
  2. Conduct substrate fit and routing studies to establish design, performance, and cost tradeoffs.
  3. Define and implement substrate design rules, conducting internal and external reviews to maintain quality standards.
  4. Analyze data, resolve Design Rule Checks (DRCs), and optimize designs for manufacturability and performance.
  5. Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions.

Skills

Required

  • Package design tools such as Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks.
  • Physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversions.
  • Microelectronic package or PCB physical layout design and the associated manufacturing processes.

Nice to have

  • microelectronic package substrate design
  • package I/O routing
  • technology development
  • microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS.
  • Analytical and problem-solving skills
  • debugging
  • providing innovative solutions
  • scripting using Python, VB, C, or similar languages.