NVIDIA is seeking a highly motivated, experienced Hardware Engineer to join our dynamic and fast-paced Silicon Solutions Group! Artificial intelligence is changing the world significantly starting with the technologies used in our day to day lives, cars we drive, autonomous machines in agriculture farms & factories, smart cities and science & technology development activities. GPUs are providing spectacular speed ups to scientific and medical research, enabling the advancement of humanity like never before. There has never been a more exciting time to work in NVIDIA.

As part of the Silicon Solutions Team, we architect and deliver groundbreaking solutions for productizing NVIDIA's chips into consumer, professional, server, mobile, and automotive markets. Silicon characterization, correlation to arch & design expectations, finalize product specifications, develop productization techniques and infrastructure around it are part of our responsibilities. Dealing with challenges of the latest process node technologies is also part of the work.

What you'll be doing:

Perform test case execution, debug silicon issues related to correlation and functionality, generate high quality results and provide design feedback.
Find creative solutions to sophisticated silicon and system level problems and be on the frontline to lead show-stopper bugs, to enable product shipment.
Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineers, process/reliability specialists, ATE engineers, and operations in a dynamic & high-energy work environment to bring industry-defining products to market.
Collaborate with cross-functional teams to craft essential next generation product features that are important for performance, power optimization, and power management.
Collaborate to craft tools for post-silicon work, build post-silicon method‐ ologies to characterize silicon power, correlate silicon behaviour with simulation
Work with various Arch & Design teams to come up with test plans of new features.
Collaborate with other validation &bring up teams to bring up/characterize silicon power and power saving features.
Work with design & estimation teams to correlate with pre-silicon expectation, work with HW and SW teams to do the vital tuning and optimization of silicon power.
Develop power consumption models to be used in binning, productization and customer application notes, characterize and develop various power control mechanisms together with Arch/Design/SW teams.

What we need to See:

B. Tech or M. Tech in Electronics Engineering stream, with 2+ years related work experience, excellent problem solving, collaborative, and interpersonal skills.
Strong understanding of aspects related to silicon power and performance, technology node impacts, Hardware and Software interactions at system level.
Hands-on experience with silicon bring up, validation and productization, good knowledge in board and system design considerations, Power supply design.
Very good problem solving and hardware debugging skills, very good data analysis and logical reasoning skills.
Strong familiarity with HW lab environment and understanding of various lab equipment.
Experience in working with windows. Linux exposure is highly preferred.
Working experience with scripting languages like perl and/or python is a plus point.
Must be a great teammate and ready to collaborate with global teams from diverse cultural backgrounds in a high energy environment.
Exposure to critical path analysis, power analysis, process technologies, transistor/device physics, silicon reliability and aging mechanisms.
Background with power supply and substrate noise analysis and mitigation. Exposure to digital design, circuit analysis, computer architecture, BIOS, drivers, and software applications.

#LI-Hybrid

What you'll be doing:

Perform test case execution, debug silicon issues related to correlation and functionality, generate high quality results and provide design feedback.
Find creative solutions to sophisticated silicon and system level problems and be on the frontline to lead show-stopper bugs, to enable product shipment.
Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineers, process/reliability specialists, ATE engineers, and operations in a dynamic & high-energy work environment to bring industry-defining products to market.
Collaborate with cross-functional teams to craft essential next generation product features that are important for performance, power optimization, and power management.
Collaborate to craft tools for post-silicon work, build post-silicon method‐ ologies to characterize silicon power, correlate silicon behaviour with simulation
Work with various Arch & Design teams to come up with test plans of new features.
Collaborate with other validation &bring up teams to bring up/characterize silicon power and power saving features.
Work with design & estimation teams to correlate with pre-silicon expectation, work with HW and SW teams to do the vital tuning and optimization of silicon power.
Develop power consumption models to be used in binning, productization and customer application notes, characterize and develop various power control mechanisms together with Arch/Design/SW teams.

What we need to See:

B. Tech or M. Tech in Electronics Engineering stream, with 2+ years related work experience, excellent problem solving, collaborative, and interpersonal skills.
Strong understanding of aspects related to silicon power and performance, technology node impacts, Hardware and Software interactions at system level.
Hands-on experience with silicon bring up, validation and productization, good knowledge in board and system design considerations, Power supply design.
Very good problem solving and hardware debugging skills, very good data analysis and logical reasoning skills.
Strong familiarity with HW lab environment and understanding of various lab equipment.
Experience in working with windows. Linux exposure is highly preferred.
Working experience with scripting languages like perl and/or python is a plus point.
Must be a great teammate and ready to collaborate with global teams from diverse cultural backgrounds in a high energy environment.
Exposure to critical path analysis, power analysis, process technologies, transistor/device physics, silicon reliability and aging mechanisms.
Background with power supply and substrate noise analysis and mitigation. Exposure to digital design, circuit analysis, computer architecture, BIOS, drivers, and software applications.

#LI-Hybrid