Soc Clock Distribution Engineer

NVIDIA NVIDIA · Semiconductors · Tel Aviv, Israel +1

NVIDIA is looking for a SOC Clock Distribution Engineer to design and implement SOC level clock requirements, focusing on chip level design aspects like partitioning, CDC, synthesis, and quality checks. The role requires proven experience in physical design, particularly clock distribution in constrained products, and proficiency in scripting languages.

What you'd actually do

  1. Designing and implementing SOC level clock requirements
  2. Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks
  3. Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues

Skills

Required

  • B.SC. in Electrical Engineering/Computer Engineering
  • 3+ years of confirmed experience in chip design
  • Shown hands on physical design skills in clock distribution in tight multi power and timing/layout constrained products
  • Proficiency in at least one common scripting languages like perl, python, bash, Tcl

Nice to have

  • Passion for quality
  • Experience with delivery back to RTL, to physical design, and other customers

What the JD emphasized

  • clock distribution
  • physical design