Soc Design Engineer, Asic Tools and Methodology Development

NVIDIA NVIDIA · Semiconductors · Austin, TX

This role focuses on developing and deploying in-house tools and workflows for SOC design and verification at NVIDIA. The engineer will manage tools for common design blocks, act as a DevOps engineer for automated RTL generation, and build new integration methodologies. Requires a Bachelor's/Master's in EE/CE, 3+ years of experience, Verilog, Python/Perl scripting, and Unix/Linux shell scripting.

What you'd actually do

  1. Develop and deploy in-house tools and workflows to support engineering business units across NVIDIA.
  2. Take ownership of tools that verify common design blocks used in all products at NVIDIA.
  3. Act as a "DevOps" engineer for automated RTL generation by developing new features and maintaining efficient operations for existing users.
  4. Build new workflows and methodologies to ensure smooth integration into various IP development environments.

Skills

Required

  • Verilog
  • Python
  • Perl
  • Unix/Linux shell scripting
  • Makefiles
  • Digital design concepts

Nice to have

  • ASIC verification
  • Clocks/Resets design and verification
  • CDC related design/verification flows
  • Backend flows (Synthesis, Timing, etc)