Soc Design Verification Engineer - Emulation

Intel Intel · Semiconductors · Oregon, Hillsboro, United States

This role focuses on SoC Design Verification using Emulation, involving building emulation targets, supporting new features/IPs, debugging failures, developing validation tools, and performing system-level validation tasks. It requires experience with technical specs, RTL code, and building emulation models for large-scale SoCs.

What you'd actually do

  1. Building multiple emulation targets for an SoC
  2. Adding support for new features/IPs into existing emulation models
  3. Learning the architecture and microarchitecture by debugging failures to the root cause
  4. Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
  5. Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models

Skills

Required

  • Bachelor’s degree in Computer Science, Computer Engineering or Electrical Engineering plus and 5 years of experience OR a Master’s Degree and 3 years of experience
  • Minimum of 2 years of relevant experience in reading and interpreting technical specs and Register Transfer Level (RTL) code
  • Minimum of 2 years of relevant experience in building emulation models for large scale SoCs
  • Minimum of 2 years of relevant experience in UNIX or Linux

Nice to have

  • Minimum 2 years' experience with IA-32 assembly and Verilog programming experience
  • Minimum 2 years' experience with validation or testing experience, especially in a silicon design team