Soc Firmware Engineering Manager, Annapurna Labs Machine Learning Acceleration, Aws

Amazon Amazon · Big Tech · Cupertino, CA · Software Development

Engineering Manager for SoC Firmware on AWS's custom ML accelerator chips (Trainium/Inferentia). The role focuses on the lowest layer of user-space software (HAL) that boots, configures, and manages hardware blocks on the chip. Responsibilities include managing a team, coordinating deliverables, owning bring-up for new chip tape-outs, prioritizing work, driving architecture, and shipping C++ codebase across multiple environments (simulation, emulation, production). The role requires deep expertise in low-level software, embedded systems, and hardware/software interaction, but not necessarily ML background.

What you'd actually do

  1. Manage, coach, and grow a team of 6 engineers — set technical direction, own hiring, and create an environment where strong engineers want to stay
  2. Coordinate deliverables across chip architects, RTL designers, verification engineers, validation engineers, and platform software teams — you're the single point of accountability for HAL readiness on every new chip program
  3. Own bring-up for new SoC tape-outs, from first-silicon power-on through production fleet deployment
  4. Prioritize work across multiple concurrent chip programs and customer teams, balancing urgent bring-up needs against long-term architecture investments
  5. Drive the architecture of our C++ template metaprogramming framework, BUTR (Built-in Unit Test for Registers), and HITL (Hardware-in-the-Loop) test infrastructure

Skills

Required

  • 3+ years of engineering team management experience
  • 7+ years of professional software development in C or C++, including embedded, firmware, or systems-level development
  • 4+ years of designing or architecting software systems (abstraction layers, hardware/software interfaces)
  • Experience developing software that interfaces directly with hardware: SoC, ASIC, FPGA, or embedded microcontrollers
  • Experience with register-level programming and hardware debug (waveform analysis, bus-level tracing, or similar)

Nice to have

  • Experience in recruiting, hiring, mentoring/coaching and managing teams of Software Engineers to improve their skills, and make them more effective, product software engineers
  • Experience with silicon bring-up or pre/post-silicon software validation
  • Experience shipping software across multiple target platforms (simulation, emulation, production hardware)
  • Familiarity with bus protocols (APB, AXI, PCIe) or memory subsystems (HBM, DDR)
  • Experience with C++ template metaprogramming or code generation frameworks
  • Experience building or maintaining hardware abstraction layers or board support packages

What the JD emphasized

  • low-level software
  • register-level issues
  • firmware
  • hardware abstraction layer
  • silicon bring-up
  • pre-silicon software
  • first-silicon power-on
  • production fleet deployment
  • register-level programming
  • hardware debug
  • silicon bring-up
  • pre/post-silicon software validation