Soc Functional Validation Engineer

Intel Intel · Semiconductors · Guadalajara, Mexico

This role focuses on the functional validation of integrated SoCs, including IP integration, system-level features, and silicon debug. Responsibilities include defining, developing, and performing validation, reviewing design changes, developing methodologies and test plans, and collaborating with various engineering teams throughout the product life cycle. The role also involves developing post-silicon validation infrastructure and publishing validation reports.

What you'd actually do

  1. Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and system level features.
  2. Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met.
  3. Reviews proposed design changes to assess impact on validation plans, tasks, and timelines.
  4. Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis.
  5. Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues.

Skills

Required

  • Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • 5+ years of total experience
  • Working/developing test plans
  • Developing in a Linux/UNIX environment
  • Object-oriented programming in coding any of the languages: C, C++, C#, Perl and/or Python Software
  • Hardware, system bring-up, and/or silicon power-on
  • Advance English level
  • Must have unrestricted, permanent right to work in Mexico

Nice to have

  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • 7+ years of experience
  • Hardware/RTL development or debug experience, RTL debug, review Verilog code and correlate with waveform captures
  • Developing test automation frameworks
  • Debugging or developing fpga/emulation models
  • Firmware/Software debug of large C/C++ applications, provide fixes, GitHub knowledge
  • Experience with design and derive testing for system clock/system reset flows
  • PCIe protocol and/or PCIe interfaces testing experience
  • Lab equipment (Logic Analyzers, Oscilloscopes, protocol analyzers)

What the JD emphasized

  • 5+ years of total experience
  • Advance English level
  • Must have unrestricted, permanent right to work in Mexico