Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
- Utilize performance and power models from the architecture team, as well as lab measurements, to validate and tune performance against established goals.
- Design and build tests to verify that the SoC design meets those goals.
- Develop and implement advanced technologies for running benchmark representations on pre-silicon environments.
- Analyze complex problems, identify core design weaknesses, and drive the resolution of performance issues in both pre- and post-silicon environments.
- Develop performance measurement frameworks, including Key Performance Indicators (KPIs), to produce regular reports and dashboards that support stakeholder decision-making.
Qualifications
Minimum qualifications:
- Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering, or equivalent experience.
- 8 years of experience in SoC or Central Processing Unit (CPU) performance and power modeling, analysis, and debugging.
- Experience with computer architecture, focusing in the areas like interconnects, traffic Quality of Service (QoS), distributed caches, and I/O flows.
- Experience in programming languages such as C, C++, or similar.
- Experience in identifying, troubleshooting, and solving performance problems.
Preferred qualifications:
- Experience with hardware description languages like Verilog or SystemVerilog.
- Experience in one or more functional areas, such as coherent fabrics (e.g., AMBA CHI/AXI), memory controllers (e.g., LPDDR5, DDR5), or I/O controllers (e.g., PCIe, CXL).
- Experience in productizing features that enhance the performance or power characteristics of a design.
- Experience in building fast, accurate SoC/CPU performance models in C++.
- Experience in pre-silicon and post-silicon analysis and debugging.