Soc Pre-silicon Verification Engineer

Intel Intel · Semiconductors · Guadalajara, Mexico

This role focuses on the pre-silicon functional logic verification of an integrated SoC to ensure it meets specifications. Responsibilities include defining and developing verification plans, test benches, and environments, executing these plans through emulation and system simulation, debugging issues, and collaborating with various design teams. The role also involves incorporating security verification and improving the verification infrastructure.

What you'd actually do

  1. Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
  2. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
  3. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
  4. Replicates, root causes, and debugs issues in the presilicon environment.
  5. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.

Skills

Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science or a related field with 3+ years of experience in Industry-standard or Master's degree with 2+ years of experience.
  • 2+ years of experience in Industry-standard verification methodologies such as UVM or System Verilog or relevant experience in Silicon Validation.
  • Advance English level.

Nice to have

  • 4+ years System Verilog and UVM experience
  • 3+ years in Python for test automation
  • 3+ years in ARM-based SoC or equivalent architectures
  • 3+ years in Pre-silicon verification experience
  • C/C++ and scripting proficiency (Perl, Tcl, Shell)
  • Tools and Verification
  • 2+ years with simulation tools (VCS, Xcelium, Questa)
  • Formal verification tools and coverage analysis
  • Constrained random and assertion-based verification
  • AMBA protocols (AXI, AHB, APB) and interconnects
  • Memory subsystems, cache coherency, power management
  • High-speed interfaces (PCIe, DDR, USB, Ethernet)
  • Linux/Unix and version control (Git, Perforce)
  • Regression testing and CI/CD pipelines
  • Security verification methodologies
  • Experience in some or all aspects of pre-silicon functional verification, including planning, debug, testbench design, UPF and coverage closure

What the JD emphasized

  • security verification
  • security coverage
  • security verification methodologies