Sr. Asic Design Engineer, Cloud-scale Machine Learning Acceleration Team

Amazon Amazon · Big Tech · Austin, TX · Software Development

The role focuses on designing and optimizing hardware (ASICs) for AWS's machine learning servers, specifically for inference acceleration. This involves integrating subsystems, implementing RTL, analyzing trade-offs for performance, power, and area, and working with various engineering teams throughout the design cycle.

What you'd actually do

  1. integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
  2. As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
  3. Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
  4. Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
  5. Perform lint and clock domain crossing quality checks on the design.

Skills

Required

  • B.S. in Electrical Engineering or related technical field
  • 5+ years in RTL design for SOC
  • 5+ years of VLSI engineering
  • 5+ years with code quality tools including: Spyglass, LINT, or CDC

Nice to have

  • Master's degree in electrical engineering, computer engineering, or equivalent
  • Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
  • Experience with automation and scripting languages such as Python
  • Familiarity with data path design, interconnects, AXI protocol
  • Good debug skills to analyze RTL test failures
  • Are familiar with scripting in Python
  • Are proficient with assertions
  • Have good debug skills to analyze RTL test failures
  • Have a "Learn and Be Curious" mindset

What the JD emphasized

  • custom designed machine learning inference datacenter server
  • AWS Inferentia
  • machine learning acceleration