Sr. Emulation Engineer, Aws Annapurna Labs

Amazon Amazon · Big Tech · Cupertino, CA · Applied Science

The role focuses on designing and optimizing hardware for AWS data centers, specifically for machine learning inference servers like AWS Inferentia. The engineer will build and execute emulation platforms for system validation of ML chip designs, working with various teams to define requirements, develop testbenches, and ensure the quality and performance of the delivered design. This involves using emulation tools, developing bus functional models, and automating system flows.

What you'd actually do

  1. Design emulation capabilities in system verilog/C/C++/Python/Shell scripts to facilitate system validation flows
  2. Develop scalable compile flows targeting project requirements
  3. Knowledge of end to end emulation compilation flows involving front end and back end synthesis
  4. Familiar with using emulation tool chain from Zebu, Cadence or Veloce
  5. Develop bus functional prototype models using DPI programming in system verilog/C/C++

Skills

Required

  • System Verilog
  • C/C++
  • Python
  • Shell scripts
  • Emulation tool chain (Zebu, Cadence or Veloce)
  • DPI programming
  • Bus functional prototype models
  • Automation frameworks
  • Post-Silicon Flow experience
  • Bash
  • Tcl
  • gdb

Nice to have

  • Master's degree or Ph.D. degree in Electrical Engineering or related field
  • RTL coding and debug
  • Performance, power, area analysis and trade-offs
  • Modern ASIC/FPGA design and verification tools
  • SOC bring-up
  • Post-silicon validation

What the JD emphasized

  • 8+ years of creating and maintaining automation frameworks for Post-Silicon Flow experience