Sr. Power Integrity Engineer, AI Hardware

Tesla Tesla · Auto · Palo Alto, CA · Tesla AI

This role focuses on the power integrity of AI hardware, specifically designing and validating power delivery networks for AI chips, packages, and systems. It involves electromagnetic simulation, DC/AC analysis, and lab validation, with a focus on ensuring efficient and low-noise power delivery to AI silicon.

What you'd actually do

  1. Architect and optimize low-impedance PDNs, including VRMs, PCB planes, and pcb/package-level decoupling strategies, to meet strict target impedance and voltage droop specifications
  2. Perform 3D/2D electromagnetic simulation, DC IR drop, AC impedance, and transient analysis using industry-standard tools (Ansys SIwave/HFSS, Cadence Sigrity/PowerSI)
  3. Collaborate closely with SoC design, package, and PCB layout teams to influence stack-up, ballmaps, and routing guidelines to achieve first-pass silicon success
  4. Define PI test patterns and validation items. Lead lab bring-up, measurement, and debugging of PI issues. Correlate simulation models with measurements using VNAs, Oscilloscopes
  5. Develop and standardize automated simulation workflows and reporting pipelines (Python, MATLAB, or TCL)

Skills

Required

  • Power Integrity
  • Power Delivery Network (PDN) design
  • electromagnetic simulation
  • DC IR drop analysis
  • AC impedance analysis
  • transient analysis
  • Ansys SIwave/HFSS
  • Cadence Sigrity/PowerSI
  • Python
  • MATLAB
  • TCL
  • high-speed instruments
  • VNA
  • Oscilloscopes
  • TDR
  • advanced IC packaging technologies
  • on-chip IR analysis
  • signal integrity

Nice to have

  • 3D/2D electromagnetic simulation
  • PCB planes
  • VRMs
  • package-level decoupling strategies
  • SoC design
  • package design
  • PCB layout
  • lab bring-up
  • measurement
  • debugging
  • simulation models
  • VNAs
  • Oscilloscopes
  • automated simulation workflows
  • reporting pipelines
  • 2.5D/3D integration
  • silicon interposers
  • chiplets

What the JD emphasized

  • AI chips
  • AI hardware
  • power integrity
  • Power Delivery Network (PDN) design