Sr. Soc Power Engineer, Annapurna Labs - Cloud Scale Machine Learning

Amazon Amazon · Big Tech · Austin, TX · Applied Science

This role is for a Senior SoC Power Engineer focused on developing and optimizing power consumption for machine learning accelerators (Inferentia and Trainium SoCs) within AWS. The engineer will be responsible for power analysis and modeling from RTL to netlist, identifying power saving opportunities, and correlating simulation results with lab measurements. This is an engineering role focused on the hardware infrastructure that powers AI workloads.

What you'd actually do

  1. Responsible for full chip power analysis & modelling at various stages of design (RTL to gate level netlist)
  2. Develop and maintain dashboards for power rollups
  3. Work with designers, architects, Verification engineers and Physical Design engineers to develop vectors for IR analysis, Thermal analysis and power estimation
  4. Give feedback to designers and architects on how to reduce power
  5. Make power measurements in the lab and correlate back to simulations.

Skills

Required

  • Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering
  • BS + 6yrs or MS + 5yrs or PhD + 3yr in EE/CS
  • Expert on power analysis tools like PrimePower, PowerArtist or similar
  • Ability to give feedback to RTL designers and Physical Designers on how to reduce power
  • Highly proficient with scripting language (Tcl, Perl, Python or similar)
  • Good understanding of Physical Design, EM/IR, Power Integrity, and Thermal at the die, package, board, and server level
  • Understanding of lab equipment use and capable of doing lab power analysis
  • Knowledge of deep circuit-level chip power

Nice to have

  • Familiarity with Make or similar for automation of power rollups
  • Experience with RTL design (System verilog)
  • Familiarity with EMIR analysis tools (Redhawk / Voltus)
  • Experience with Zebu Emulator platform

What the JD emphasized

  • proven track record of handling challenges at scale
  • modeling and estimating power at every stage of the design from early RTL to final netlist
  • driving ways to reduce power consumption of our machine learning accelerators

Other signals

  • ML accelerators
  • SoC Power Engineer
  • power analysis
  • power estimation
  • reduce power consumption